// $Module: reg_ive_update_bg $
// $RegisterBank Version: V 1.0.00 $
// $Author:  $
// $Date: Tue, 07 Dec 2021 11:01:06 AM $
//

//GEN REG ADDR/OFFSET/MASK
#define  IVE_UPDATE_BG_REG_1  0x0
#define  IVE_UPDATE_BG_REG_H04  0x4
#define  IVE_UPDATE_BG_REG_2  0x8
#define  IVE_UPDATE_BG_REG_3  0xc
#define  IVE_UPDATE_BG_REG_CTRL0  0x10
#define  IVE_UPDATE_BG_REG_CTRL1  0x14
#define  IVE_UPDATE_BG_REG_CTRL2  0x18
#define  IVE_UPDATE_BG_REG_CTRL3  0x1c
#define  IVE_UPDATE_BG_REG_CTRL4  0x20
#define  IVE_UPDATE_BG_REG_CTRL5  0x24
#define  IVE_UPDATE_BG_REG_CTRL6  0x28
#define  IVE_UPDATE_BG_REG_CTRL7  0x2c
#define  IVE_UPDATE_BG_REG_CTRL8  0x30
#define  IVE_UPDATE_BG_REG_CROP_S  0x34
#define  IVE_UPDATE_BG_REG_CROP_E  0x38
#define  IVE_UPDATE_BG_REG_CROP_CTL  0x3c
#define  IVE_UPDATE_BG_REG_SOFTRST   0x0
#define  IVE_UPDATE_BG_REG_SOFTRST_OFFSET 0
#define  IVE_UPDATE_BG_REG_SOFTRST_MASK   0x1
#define  IVE_UPDATE_BG_REG_SOFTRST_BITS   0x1
#define  IVE_UPDATE_BG_REG_ENABLE   0x4
#define  IVE_UPDATE_BG_REG_ENABLE_OFFSET 0
#define  IVE_UPDATE_BG_REG_ENABLE_MASK   0x1
#define  IVE_UPDATE_BG_REG_ENABLE_BITS   0x1
#define  IVE_UPDATE_BG_REG_CK_EN   0x4
#define  IVE_UPDATE_BG_REG_CK_EN_OFFSET 1
#define  IVE_UPDATE_BG_REG_CK_EN_MASK   0x2
#define  IVE_UPDATE_BG_REG_CK_EN_BITS   0x1
#define  IVE_UPDATE_BG_REG_UPDATEBG_BYP_MODEL   0x4
#define  IVE_UPDATE_BG_REG_UPDATEBG_BYP_MODEL_OFFSET 2
#define  IVE_UPDATE_BG_REG_UPDATEBG_BYP_MODEL_MASK   0x4
#define  IVE_UPDATE_BG_REG_UPDATEBG_BYP_MODEL_BITS   0x1
#define  IVE_UPDATE_BG_REG_SHDW_SEL   0x8
#define  IVE_UPDATE_BG_REG_SHDW_SEL_OFFSET 0
#define  IVE_UPDATE_BG_REG_SHDW_SEL_MASK   0x1
#define  IVE_UPDATE_BG_REG_SHDW_SEL_BITS   0x1
#define  IVE_UPDATE_BG_REG_CTRL_DMY1   0xc
#define  IVE_UPDATE_BG_REG_CTRL_DMY1_OFFSET 0
#define  IVE_UPDATE_BG_REG_CTRL_DMY1_MASK   0xffffffff
#define  IVE_UPDATE_BG_REG_CTRL_DMY1_BITS   0x20
#define  IVE_UPDATE_BG_REG_U32CURFRMNUM   0x10
#define  IVE_UPDATE_BG_REG_U32CURFRMNUM_OFFSET 0
#define  IVE_UPDATE_BG_REG_U32CURFRMNUM_MASK   0xffffffff
#define  IVE_UPDATE_BG_REG_U32CURFRMNUM_BITS   0x20
#define  IVE_UPDATE_BG_REG_U32PRECHKTIME   0x14
#define  IVE_UPDATE_BG_REG_U32PRECHKTIME_OFFSET 0
#define  IVE_UPDATE_BG_REG_U32PRECHKTIME_MASK   0xffffffff
#define  IVE_UPDATE_BG_REG_U32PRECHKTIME_BITS   0x20
#define  IVE_UPDATE_BG_REG_U32FRMCHKPERIOD   0x18
#define  IVE_UPDATE_BG_REG_U32FRMCHKPERIOD_OFFSET 0
#define  IVE_UPDATE_BG_REG_U32FRMCHKPERIOD_MASK   0xfff
#define  IVE_UPDATE_BG_REG_U32FRMCHKPERIOD_BITS   0xc
#define  IVE_UPDATE_BG_REG_U32INITMINTIME   0x18
#define  IVE_UPDATE_BG_REG_U32INITMINTIME_OFFSET 16
#define  IVE_UPDATE_BG_REG_U32INITMINTIME_MASK   0x1fff0000
#define  IVE_UPDATE_BG_REG_U32INITMINTIME_BITS   0xd
#define  IVE_UPDATE_BG_REG_U32STYBGMINBLENDTIME   0x1c
#define  IVE_UPDATE_BG_REG_U32STYBGMINBLENDTIME_OFFSET 0
#define  IVE_UPDATE_BG_REG_U32STYBGMINBLENDTIME_MASK   0xffff
#define  IVE_UPDATE_BG_REG_U32STYBGMINBLENDTIME_BITS   0x10
#define  IVE_UPDATE_BG_REG_U32STYBGMAXBLENDTIME   0x1c
#define  IVE_UPDATE_BG_REG_U32STYBGMAXBLENDTIME_OFFSET 16
#define  IVE_UPDATE_BG_REG_U32STYBGMAXBLENDTIME_MASK   0xffff0000
#define  IVE_UPDATE_BG_REG_U32STYBGMAXBLENDTIME_BITS   0x10
#define  IVE_UPDATE_BG_REG_U32DYNBGMINBLENDTIME   0x20
#define  IVE_UPDATE_BG_REG_U32DYNBGMINBLENDTIME_OFFSET 0
#define  IVE_UPDATE_BG_REG_U32DYNBGMINBLENDTIME_MASK   0x1fff
#define  IVE_UPDATE_BG_REG_U32DYNBGMINBLENDTIME_BITS   0xd
#define  IVE_UPDATE_BG_REG_U32STATICDETMINTIME   0x20
#define  IVE_UPDATE_BG_REG_U32STATICDETMINTIME_OFFSET 16
#define  IVE_UPDATE_BG_REG_U32STATICDETMINTIME_MASK   0x1fff0000
#define  IVE_UPDATE_BG_REG_U32STATICDETMINTIME_BITS   0xd
#define  IVE_UPDATE_BG_REG_U16FGMAXFADETIME   0x24
#define  IVE_UPDATE_BG_REG_U16FGMAXFADETIME_OFFSET 0
#define  IVE_UPDATE_BG_REG_U16FGMAXFADETIME_MASK   0xff
#define  IVE_UPDATE_BG_REG_U16FGMAXFADETIME_BITS   0x8
#define  IVE_UPDATE_BG_REG_U16BGMAXFADETIME   0x24
#define  IVE_UPDATE_BG_REG_U16BGMAXFADETIME_OFFSET 8
#define  IVE_UPDATE_BG_REG_U16BGMAXFADETIME_MASK   0xff00
#define  IVE_UPDATE_BG_REG_U16BGMAXFADETIME_BITS   0x8
#define  IVE_UPDATE_BG_REG_U8STYBGACCTIMERATETHR   0x24
#define  IVE_UPDATE_BG_REG_U8STYBGACCTIMERATETHR_OFFSET 16
#define  IVE_UPDATE_BG_REG_U8STYBGACCTIMERATETHR_MASK   0x7f0000
#define  IVE_UPDATE_BG_REG_U8STYBGACCTIMERATETHR_BITS   0x7
#define  IVE_UPDATE_BG_REG_U8CHGBGACCTIMERATETHR   0x24
#define  IVE_UPDATE_BG_REG_U8CHGBGACCTIMERATETHR_OFFSET 23
#define  IVE_UPDATE_BG_REG_U8CHGBGACCTIMERATETHR_MASK   0x3f800000
#define  IVE_UPDATE_BG_REG_U8CHGBGACCTIMERATETHR_BITS   0x7
#define  IVE_UPDATE_BG_REG_U8DYNBGACCTIMETHR   0x28
#define  IVE_UPDATE_BG_REG_U8DYNBGACCTIMETHR_OFFSET 0
#define  IVE_UPDATE_BG_REG_U8DYNBGACCTIMETHR_MASK   0x3f
#define  IVE_UPDATE_BG_REG_U8DYNBGACCTIMETHR_BITS   0x6
#define  IVE_UPDATE_BG_REG_U8BGEFFSTARATETHR   0x28
#define  IVE_UPDATE_BG_REG_U8BGEFFSTARATETHR_OFFSET 8
#define  IVE_UPDATE_BG_REG_U8BGEFFSTARATETHR_MASK   0x7f00
#define  IVE_UPDATE_BG_REG_U8BGEFFSTARATETHR_BITS   0x7
#define  IVE_UPDATE_BG_REG_U8DYNBGDEPTH   0x28
#define  IVE_UPDATE_BG_REG_U8DYNBGDEPTH_OFFSET 16
#define  IVE_UPDATE_BG_REG_U8DYNBGDEPTH_MASK   0x30000
#define  IVE_UPDATE_BG_REG_U8DYNBGDEPTH_BITS   0x2
#define  IVE_UPDATE_BG_REG_U8ACCEBGLEARN   0x28
#define  IVE_UPDATE_BG_REG_U8ACCEBGLEARN_OFFSET 24
#define  IVE_UPDATE_BG_REG_U8ACCEBGLEARN_MASK   0x1000000
#define  IVE_UPDATE_BG_REG_U8ACCEBGLEARN_BITS   0x1
#define  IVE_UPDATE_BG_REG_U8DETCHGREGION   0x28
#define  IVE_UPDATE_BG_REG_U8DETCHGREGION_OFFSET 25
#define  IVE_UPDATE_BG_REG_U8DETCHGREGION_MASK   0x2000000
#define  IVE_UPDATE_BG_REG_U8DETCHGREGION_BITS   0x1
#define  IVE_UPDATE_BG_REG_STAT_PIXNUM   0x2c
#define  IVE_UPDATE_BG_REG_STAT_PIXNUM_OFFSET 0
#define  IVE_UPDATE_BG_REG_STAT_PIXNUM_MASK   0xffffffff
#define  IVE_UPDATE_BG_REG_STAT_PIXNUM_BITS   0x20
#define  IVE_UPDATE_BG_REG_STAT_SUMLUM   0x30
#define  IVE_UPDATE_BG_REG_STAT_SUMLUM_OFFSET 0
#define  IVE_UPDATE_BG_REG_STAT_SUMLUM_MASK   0xffffffff
#define  IVE_UPDATE_BG_REG_STAT_SUMLUM_BITS   0x20
#define  IVE_UPDATE_BG_REG_CROP_START_X   0x34
#define  IVE_UPDATE_BG_REG_CROP_START_X_OFFSET 0
#define  IVE_UPDATE_BG_REG_CROP_START_X_MASK   0xffff
#define  IVE_UPDATE_BG_REG_CROP_START_X_BITS   0x10
#define  IVE_UPDATE_BG_REG_CROP_END_X   0x34
#define  IVE_UPDATE_BG_REG_CROP_END_X_OFFSET 16
#define  IVE_UPDATE_BG_REG_CROP_END_X_MASK   0xffff0000
#define  IVE_UPDATE_BG_REG_CROP_END_X_BITS   0x10
#define  IVE_UPDATE_BG_REG_CROP_START_Y   0x38
#define  IVE_UPDATE_BG_REG_CROP_START_Y_OFFSET 0
#define  IVE_UPDATE_BG_REG_CROP_START_Y_MASK   0xffff
#define  IVE_UPDATE_BG_REG_CROP_START_Y_BITS   0x10
#define  IVE_UPDATE_BG_REG_CROP_END_Y   0x38
#define  IVE_UPDATE_BG_REG_CROP_END_Y_OFFSET 16
#define  IVE_UPDATE_BG_REG_CROP_END_Y_MASK   0xffff0000
#define  IVE_UPDATE_BG_REG_CROP_END_Y_BITS   0x10
#define  IVE_UPDATE_BG_REG_CROP_ENABLE   0x3c
#define  IVE_UPDATE_BG_REG_CROP_ENABLE_OFFSET 0
#define  IVE_UPDATE_BG_REG_CROP_ENABLE_MASK   0x1
#define  IVE_UPDATE_BG_REG_CROP_ENABLE_BITS   0x1
